Cache

Interface to the low-level caching system of the PowerPC processor. More...

Collaboration diagram for Cache:

Functions
void	DCInvalidateRange (void *addr, uint32_t size)
	Invalidates a range of cached data, in blocks. More...
void	DCFlushRange (void *addr, uint32_t size)
	Flushes a range of cached data, in blocks. More...
void	DCStoreRange (void *addr, uint32_t size)
	Stores a range of cached data, in blocks. More...
void	DCFlushRangeNoSync (void *addr, uint32_t size)
	Similar to DCFlushRange, though this function will not run PowerPC sync and eieio instructions after flushing. More...
void	DCStoreRangeNoSync (void *addr, uint32_t size)
	Similar to DCStoreRange, though this function will not run PowerPC sync and eieio instructions after storing. More...
void	DCZeroRange (void *addr, uint32_t size)
	Zeroes the given area of the data cache (to the nearest block) with a loop of PowerPC dcbz instructions. More...
void	DCTouchRange (void *addr, uint32_t size)
	Gives the processor a hint that the given range of memory is likely to be accessed soon, and that performance would be improved if it were cached. More...
void	ICInvalidateRange (void *addr, uint32_t size)
	Invalidates a range of cached instructions, in blocks. More...
void	OSMemoryBarrier ()

Detailed Description

Interface to the low-level caching system of the PowerPC processor.

The cache acts as a middleman between main memory and the processor, speeding up access to frequently-used data. However, the Wii U is not cache-coherent - written data may be cached without updating main memory, and data read from the cache may be out of date with respect to memory. While this isn't a problem for most code, certain hardware accesses may require manual synchronisation of the cache. This is achieved with coreinit's Cache group of functions.

Since the PowerPC has a seperate cache for data and instructions, any data written with the intent of executing it as instructions requires manual flushing and invalidation of the data and instruction caches.

Function Documentation

DCInvalidateRange()

void DCInvalidateRange	(	void *	addr,
		uint32_t	size
	)

Invalidates a range of cached data, in blocks.

Equivalent to a loop of PowerPC dcbi instructions.

This function forces the next reads from the given address to bypass the the cache and go straight to memory, resulting in slower reads that are guaranteed to reflect main memory.

Parameters

addr	The effective address of the data to invalidate.
size	The size of the range to invalidate. Will be rounded up to the next 0x20.

Note

Unnecessary use of caching functions can have an adverse performance impact. They should only be used when needed while interfacing with hardware.

DCFlushRange()

void DCFlushRange	(	void *	addr,
		uint32_t	size
	)

Flushes a range of cached data, in blocks.

Equivalent to a loop of PowerPC dcbf instructions, followed by a sync and eieio.

This function flushes any recently cached data into main memory. This allows other hardware in the console to read the data without worry of main memory being outdated. It will also invalidate cached data.

Parameters

addr	The effective address of the data to flush.
size	The size of the range to flush. Will be rounded up to the next 0x20.

Note

Unnecessary use of caching functions can have an adverse performance impact. They should only be used when needed while interfacing with hardware.

DCStoreRange()

void DCStoreRange	(	void *	addr,
		uint32_t	size
	)

Stores a range of cached data, in blocks.

Equivalent to a loop of PowerPC dcbst instructions, followed by a sync and eieio.

This function writes any recently cached data into main memory. This allows other hardware in the console to read the data without worry of main memory being outdated. This function does not invalidate the cached data.

Parameters

addr	The effective address of the data to store.
size	The size of the range to store. Will be rounded up to the next 0x20.

Note

Unnecessary use of caching functions can have an adverse performance impact. They should only be used when needed while interfacing with hardware.

DCFlushRangeNoSync()

void DCFlushRangeNoSync	(	void *	addr,
		uint32_t	size
	)

Similar to DCFlushRange, though this function will not run PowerPC sync and eieio instructions after flushing.

Parameters

addr	The effective address of the data to flush.
size	The size of the range to flush. Will be rounded up to the next 0x20.

Note

Unnecessary use of caching functions can have an adverse performance impact. They should only be used when needed while interfacing with hardware.

DCStoreRangeNoSync()

void DCStoreRangeNoSync	(	void *	addr,
		uint32_t	size
	)

Similar to DCStoreRange, though this function will not run PowerPC sync and eieio instructions after storing.

Parameters

addr	The effective address of the data to store.
size	The size of the range to store. Will be rounded up to the next 0x20.

Note

Unnecessary use of caching functions can have an adverse performance impact. They should only be used when needed while interfacing with hardware.

DCZeroRange()

void DCZeroRange	(	void *	addr,
		uint32_t	size
	)

Zeroes the given area of the data cache (to the nearest block) with a loop of PowerPC dcbz instructions.

This will not affect main memory immediately, though it will eventually trickle down. Can be combined with DCFlushRange or DCStoreRange to efficiently set memory to 0.

Warning

The size of the range passed into this function will be internally rounded up to the next multiple of 0x20. Failing to account for this could result in delayed, hard-to-diagnose memory corruption.

Parameters

addr	The effective address of the data to zero.
size	The size of the range to zero. Will be rounded up to the next 0x20.

DCTouchRange()

void DCTouchRange	(	void *	addr,
		uint32_t	size
	)

Gives the processor a hint that the given range of memory is likely to be accessed soon, and that performance would be improved if it were cached.

The processor does not have to cache the requested area, but it may do so in response to this function. This function is equvalent to a loop of PowerPC dcbt instructions.

Parameters

addr	The effective address of the data to cache.
size	The size of the range to cache. Will be rounded up to the next 0x20.

ICInvalidateRange()

void ICInvalidateRange	(	void *	addr,
		uint32_t	size
	)

Invalidates a range of cached instructions, in blocks.

Equivalent to a loop of PowerPC icbi instructions.

This function forces the next instruction fetches from the given address to bypass the the cache and go straight to memory, resulting in slower fetches that are guaranteed to reflect main memory.

Parameters

addr	The effective address of the instructions to invalidate.
size	The size of the range to invalidate. Will be rounded up to the next 0x20.

Note

Unnecessary use of caching functions can have an adverse performance impact. They should only be used when needed while interfacing with hardware.

OSMemoryBarrier()

void OSMemoryBarrier

(

)